Tag Archives: Hardware engineering

[USF-XSim-62] ‘elaborate‘ step failed with errors.[Vivado 12-4473] Detected error while running sim

[USF-XSim-62] ‘elaborate’ step failed with error(s). Please check the Tcl console output . and

[Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation.

The problems are as follows:

Ways to find problems

Method 1: messages in vivado cannot see detailed information, but after the error, the path of the log will be displayed. Open D:/vivado/fortest/fortest.sim/sim_1/behav/xsim/ elaboration.log, we can see error: [vrfc 10-3180] cannot find port ‘extreme_Result ‘on this module, modify the error

method 2: directly see the details in the log window in vivado, find the error, and then modify it

my error is that the port name of the instantiated function file in the simulation file is wrong.

Compare the size of two numbers of 8 bits

module extreme_8bit(
    extreme0,
    extreme1,
    DataSign,
    SubType,
    extreme_Result    
    );
 
input [7:0]          extreme0;//vector operand 1 to participate in the most-valued comparison
input [7:0] extreme1;//vector operand 2 to participate in the most-valued comparison
input DataSign;//0: unsigned; 1: signed
input SubType;//0: find the maximum value max;1: find the minimum value min
output reg [7:0] extreme_Result;//the final result   
reg extreme_c_carry;
wire carry;
wire [7:0] extreme_sum;
wire [7:0] temp_extreme0,temp_extreme1;//find the most value when the unsigned highest bit is the same, the virtual construction of the two numbers 
reg [7:0] add_extreme0,add_extreme1;//enter the adder's operands for subtraction operations

Translated with www.DeepL.com/Translator (free version)
reg  [7:0]          min,max;
assign temp_extreme0={1'b1,extreme0[6:0]};
assign temp_extreme1={1'b0,extreme1[6:0]};    


always @(*)begin
extreme_c_carry = 1'b1;
    if(DataSign==0)begin//0：unsigned
    {add_extreme0,add_extreme1} = {temp_extreme0,~temp_extreme1};
        if(SubType==0)begin//0: find the maximum value max, i.e. unsigned vector with same width integer subsumption max
            if(extreme0[7]! =extreme1[7]) begin // make sure the highest bit of the input data is inconsistent 
                if(extreme0[7]==1) begin //extreme0>extreme1
                    max <= extreme0;
					extreme_Result <= max;
				end 
				else begin //extreme0[7]==0;extreme1[7]==1;extreme0<extreme1
					max <= extreme1;
					extreme_Result <= max;
				end 
            end
            else begin//extreme0[7]==extreme1[7] input data highest bit is the same, remove the highest bit to do the difference
                if(extreme_sum[7]==1)begin//extreme0>extreme1,when subtracting, the highest bit does not happen to be borrowed, the highest bit built 1 is still 1
				    max <= extreme0;
				    extreme_Result <= max;							
				end 
				else begin//extreme_sum[7]==0,extreme0<extreme1,,when subtracted, the highest bit is borrowed and the constructed 1 becomes 0
				    max <= extreme1;
				    extreme_Result <= max;	
				end
            end
        end
        else begin//SubType==1,1：Find the minimum min, i.e., the minimum with unsigned vectors of the same width integer normalization 
            if(extreme0[7]! =extreme1[7]) begin // Determine if the highest bit of the input data is inconsistent 
                if(extreme0[7]==1) begin//extreme0>extreme1 
					min <= extreme1;
					extreme_Result <= min;
				end 
				else begin //extreme0[7]==0;extreme1[7]==1;extreme0<extreme1
                    min <= extreme0;
					extreme_Result <= min;
				end 
            end
            else begin//extreme0[7]==extreme1[7]Input data highest bit is the same, remove the highest bit to do the difference
                if(extreme_sum[7]==1)begin//extreme0>extreme1,when subtracting, the highest bit does not happen to borrow, the highest bit built 1 is still 1
				    min <= extreme1;
					extreme_Result <= min;							
				end 
				else begin//extreme_sum[7]==0,extreme0<extreme1,,when subtracted, the highest bit is borrowed and the constructed 1 becomes 0
				    min <= extreme0;
					extreme_Result <= min;
				end
            end
        end    
    end

    else begin//DataSign==1,1：with symbols
    {add_extreme0,add_extreme1} = {extreme0,~extreme1};
        if(SubType==0)begin//0: find the maximum value max, i.e. the signed vector with the same width integer subsumption max
            if(extreme0[7]! =extreme1[7])begin///heteroscedasticity of two numbers, the highest bit does not match the case to determine who is the largest integer                    
                if(extreme0[7]==1) begin//extreme0 is a negative number
					max <= extreme1;
					extreme_Result <= max;
				end 
				else begin //extreme1 is a negative number
					max <= extreme0;
					extreme_Result <= max;
				end                                          
            end
            else begin//The same number (with the same positive or negative) of two numbers, the highest bit of the same case to determine who is the largest integer
                if(extreme_sum[7]==1)begin//extreme0<extreme1,the result of subtraction is negative
				    max <= extreme1;
				    extreme_Result <= max;							
				end 
				else begin//extreme_sum[7]==0,extreme0>extreme1,the result of subtraction is positive
				    max <= extreme0;
				    extreme_Result <= max;	
				end
            end
        end
        else begin//SubType==1,1：Find the minimum min, i.e., the signed vector with the same width integer normalized to the minimum      
            if(extreme0[7]! =extreme1[7])begin///Determine who is the smallest integer if the two numbers with different signs and the highest bit do not match                    
                if(extreme0[7]==1) begin//extreme0 is a negative number
					min <= extreme0;
					extreme_Result <= min;
				end 
				else begin //extreme1 is negative
					min <= extreme1;
					extreme_Result <= min;
				end                                          
            end
            else begin//Two numbers with the same number (same positive or negative), the highest bit is the same to determine who is the smallest integer  
                if(extreme_sum[7]==1)begin//extreme0<extreme1,the result of subtraction is negative
				    min <= extreme0;
				    extreme_Result <= min;							
				end 
				else begin//extreme_sum[7]==0,extreme0>extreme1,the result of subtraction is positive
				    min <= extreme0;
				    extreme_Result <= min;	
				end
            end        
        end    
    end    
end    
    
RISCV_8BIT_REDADD extreme(
    .o_sum(extreme_sum),
    .o_cout(carry),
    .i_a(add_extreme0),
    .i_b(add_extreme1),
    .i_cin(extreme_c_carry)
);   
                             
endmodule

The multi bit width is divided into 8 bits to compare the size

module extreme_8bit_256( 
    extreme0,
    extreme1,
    DataSign,
    SubType,
    extreme_temp,
    extreme_result256    
    );
parameter M = 16; //VLEN = 256 ; 
parameter N = 8; //SEW = 8 ;  
 
input    [M-1:0]            extreme0;//The number of vector operands participating in the most-valued comparison1
input [M-1:0] extreme1;//vector operand 2 for the most-valued comparison
input [1:0] DataSign;//x0: unsigned; x1: signed
input [2:0] SubType;//0: find the maximum value max;1: find the minimum value min
output [M-1:0] extreme_temp;
output [N-1:0] extreme_result256;//the final result   

extreme_8bit extreme_8bit_inst0(
    .extreme0(extreme0[N-1:0]),
    .extreme1(extreme1[N-1:0]),
    .DataSign(DataSign[0]),
    .SubType(DataSign[0]),
    .extreme_Result(extreme_temp[N-1:0])   
    );   
    
    genvar i;
    generate 
    for(i = 0;i < 1;i = i + 1)begin
    extreme_8bit extreme_8bit_inst(
    .extreme0(extreme_temp[i*N+N-1:i*N]),
    .extreme1(extreme1[(i+1)*N+N-1:(i+1)*N]),
    .DataSign(DataSign[0]),
    .SubType(SubType[0]),
    .extreme_Result(extreme_temp[(i+1)*N+N-1:(i+1)*N])
    );
    
    assign extreme_result256[N-1:0] = extreme_temp[M-1:M-N];
    end
    
endgenerate 

endmodule

Simulation file (the previous file reported an error because when the extreme_8bit_256 module was instantiated, the port extreme_result256 was incorrectly written as extreme_result, and all displays did not find the port extreme_result)

module fortest_tb(    );
parameter M = 16; //VLEN = 256 ; 
parameter N = 8; //SEW = 8 ;  
   
    reg    [M-1:0]         extreme0;
    reg    [M-1:0]         extreme1;
    reg    [1:0]           DataSign;//0：unsigned; 1: signed
    reg [2:0] SubType;//0: find the maximum value max;1: find the minimum value min  
    wire   [M-1:0]         extreme_temp;
    wire   [N-1:0]         extreme_result;   

    extreme_8bit_256 extreme_8bit_256_inst( 
    .extreme0(extreme0),
    .extreme1(extreme1),
    .DataSign(DataSign),
    .SubType(SubType),
    .extreme_temp(extreme_temp),
    .extreme_result256(extreme_result)    
    );

   initial  begin//DataSign;//x0：unsigned; x1: signed  SubType;//xx0：max;  xx1：min
   extreme0 = 16'b0;
   extreme1 = 16'b0;
   DataSign = 2'b00;
   SubType = 3'b000;
   #100
   SubType = 3'b000;
   extreme0 =  16'b1010_0001_0001_0111;
   extreme1 =  16'b0100_0111_1010_0001;
   #100
   SubType = 3'b001;
   extreme0 =  16'b1010_0001_0001_0111;
   extreme1 =  16'b0100_0111_1010_0001;
   #100
   DataSign = 2'b01;
   SubType = 3'b000;
   extreme0 =  16'b1010_0001_0001_0111;
   extreme1 =  16'b0100_0111_1010_0001;
   #100
   SubType = 3'b001;
   extreme0 =  16'b1010_0001_0001_0111;
   extreme1 =  16'b0100_0111_1010_0001;
   end       
endmodule

How to Solve AD20 Channel-Offset Error

preface

Solution to Channel-Offset Error when the same circuit module of ad20 PCB is multiplexed in room format

1. Problem phenomenon

We often encounter the following problems when using room format to quickly layout circuits of the same module,

2. Solution

There are many processes of copying PCB layout of the same module circuit on the Internet, which will not be repeated here. The steps are similar, only the root cause of the problem
1: check whether the following three status settings are correct or not?
2: Channel Offset I recommend using the box, that is, select the first table and then pull down, paste the same; if you are in accordance with the EXCEL table as click Channel-Offset, and then right-click to copy, the results may lead to no copy success;.

3: before pasting, pay attention to keep the device arrangement order of the original circuit and the target circuit consistent

my main problem is the second point. I thought the copy was successful, but I didn’t copy it, so I didn’t paste it. Finally, I kept reporting errors, which annoyed me!

Dca1000 reports an error and the SPI port cannot be connected

Dca1000 reports an error and the SPI port cannot be connected

Article catalog

Dca1000 reports an error and the SPI port cannot be connected. Problem Description: problem cause: solution:

Problem Description:

When using dca1000evm board and mmwave Studio software to measure AWR/IWR board data, SPI cannot be connected

Cause of problem:

The possible causes are problems with the 60 pin HD cable of the dca1000evm, or problems with the SPI pin of the FPGA on the board

resolvent:

    replace the 60 pin HD cable. At present, TI company not only provides additional 60 pin HD cable. Therefore, it is necessary to re purchase the board or find other 60 pin HD connection lines to replace it. At present, it is known that the 60 pin HD connection line of mmwave Devpack can be used with the 60 pin HD connection line of dca1000evm to replace the FPGA chip on the board, or check whether there is faulty soldering and additional connection at the pin (metal wire may be attached to the pin)

Update ad schematic to PCB, failed to match

*Background: in the process of updating the schematic to PCB, there is often a mismatch between the components on the schematic and those on the PCB, so we should be very careful and check them one by one, otherwise there will be a lesson of blood and tears (the components in the PCB are lost).

1、 Update the schematic diagram to pcb
II. Perform device matching

There are automatic and manual. For the time being, demonstrate manual operation

for example: C35, find the first column and the second column, then select and click & gt

perform operations similar to C35 one by one

3、 Execute the change

in this figure, the remove operation is to delete the routing

in this figure, the remove operation is to delete the device

Do this carefully. You’d better take a picture, and then check whether any devices are lost one by one Is there any wiring missing!!!

Summary:
(1) this situation is generally caused by the person who changed the drawing before, just for a moment, directly changed the PCB without changing the schematic diagram or updating it
also, the PCB library path corresponding to the device is not specified.

(2) If a lot of network nodes are gone and the routing is gone as soon as the update is executed, it is the layout engineer’s method of drawing lines without nodes in pcbdoc!!!