[Solved] Quartus II waveform simulat error: error: waveform2 vwf. VT (30): near “,” syntax error, unexpected “, ‘# * * error

I. problem
when quartus is used to design 4 frequency divider based on D trigger, the following errors occur in waveform simulation:

 Error: Waveform2.vwf.vt(30): near ",": syntax error, unexpected ','
# ** Error: D:/Quartus/modelsim_ase/win32aloem/vlog failed.
# Executing ONERROR command at macro ./D4.do line 4

II. Solution

in the schematic design, my input and output ports are named input and output respectively. That’s the mistake. We just have to name it something else. For example: CLKIN, out. Then recompile and no error will be reported during simulation. The correct simulation diagram is as follows:

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