Stm32f103cbt6 keil compilation error: l6220e: load region LR_ IROM1 size (65552 bytes) exceeds limit (65536 bytes). Region contains 84 bytes of padding and 0 bytes of veneers (total 84 bytes of linker generated content).

resolvent:

Step 1

For 128K chips, modify the irom1 size to 0x20000 (in the red box below). Some versions of Keil will automatically change this location when you change the device; Some versions need to be modified manually

Step 2

Select linker → edit to open link.sct file

Modify the data after LR_IROM1 and ER_IROM1 in the file to 0x20000 (at the red box in the figure below) and save the file.

Step 3

Recompile and solve the problem

Tips

The first and second steps must be completed before compiling and testing. The first step alone may not be successful.