The following error is reported when debugging the MZ702P board using vitis2020.2 JTAG.
The reason is that the boot mode is not set to JTAG boot.

Downloading Program – F:/FPGA/Project/vitis_workspace/helloWorld/Debug/helloWorld.elf
section, .text: 0x00100000 - 0x00100a1f
section, .init: 0x00100a20 - 0x00100a2b
section, .fini: 0x00100a2c - 0x00100a37
section, .rodata: 0x00100a38 - 0x00100a77
section, .data: 0x00100a78 - 0x00100ee7
section, .eh_frame: 0x00100ee8 - 0x00100eeb
section, .mmu_tbl: 0x00104000 - 0x00107fff
section, .init_array: 0x00108000 - 0x00108003
section, .fini_array: 0x00108004 - 0x00108007
section, .bss: 0x00108008 - 0x0010802f
section, .heap: 0x00108030 - 0x0010a02f
section, .stack: 0x0010a030 - 0x0010d82f
0% 0MB 0.0MB/s ??:??ETA
aborting, 2 pending requests…
aborting, 1 pending requests…
Failed to download F:/FPGA/Project/vitis_workspace/helloWorld/Debug/helloWorld.elf
Memory write error at 0x100000. MMU section translation fault

or report the error below:

21:50:53 INFO : Checking for BSP changes to sync application flags for project ‘helloWorld’…
21:51:32 INFO : Connected to target on host ‘127.0.0.1’ and port ‘3121’.
21:51:32 INFO : Jtag cable ‘Digilent JTAG-HS1 210249856275’ is selected.
21:51:32 INFO : ‘jtag frequency’ command is executed.
21:51:32 INFO : Context for ‘APU’ is selected.
21:51:32 INFO : System reset is completed.
21:51:35 INFO : ‘after 3000’ command is executed.
21:51:35 INFO : Context for ‘APU’ is selected.
21:51:35 INFO : Hardware design and registers information is loaded from ‘F:/FPGA/Project/vitis_workspace/MZ702P/export/MZ702P/hw/MZ702P_wrapper.xsa’.
21:51:35 INFO : ‘configparams force-mem-access 1’ command is executed.
21:51:35 INFO : Context for ‘APU’ is selected.
21:51:35 INFO : Sourcing of ‘F:/FPGA/Project/vitis_workspace/helloWorld/_ide/psinit/ps7_init.tcl’ is done.
21:51:36 ERROR : Memory read error at 0xE0001034. AP transaction timeout
21:51:36 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
targets -set -nocase -filter {name =~“APU*”}
rst -system
after 3000
targets -set -nocase -filter {name =~“APU*”}
loadhw -hw F:/FPGA/Project/vitis_workspace/MZ702P/export/MZ702P/hw/MZ702P_wrapper.xsa -mem-ranges [list {0x40000000 0xbfffffff}] -regs
configparams force-mem-access 1
targets -set -nocase -filter {name =~“APU*”}
source F:/FPGA/Project/vitis_workspace/helloWorld/_ide/psinit/ps7_init.tcl
ps7_init
----------------End of Script----------------
21:51:36 ERROR : Memory read error at 0xE0001034. AP transaction timeout