Tag Archives: PCB design tutorial

[Cadence Allegro PCB Design] error: Possible pin type conflict GND/VCC Power Connected to Output

An error is reported in the schematic diagram of cadence when running DRC, and the error information is as follows.

[cadence-DRC]error: Possible pin type conflict GND/VCC  Power Connected to Output

Solution:

Step 1: run DRC to find and analyze the error source

Run DRC. After the above error is output, the green circle is error. Click it to display the error message. We can see the green error reporting circle page. Clicking on the pin attribute is connected to the pin attribute output (the output attribute will generate the VCC on the previous page, resulting in the device sharing a VCC network), but normally, the pin attribute is passive/power. Therefore, we manually change the properties of the device pin to normal.

Step 2: Change [edit part] to power attribute

Select the power component, right-click and select [edit part] to enter pin modification in schematic library mode (it is impossible to change pin attribute in this mode), and change output to power attribute (or passive)

Step 3: run DRC again to solve the problem~